View IRF6633_1255518.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

PD - 96989
IRF6633
DirectFET Power MOSFET
l l l l l l l l l
RoHs Compliant Containing No Lead and Bromide Low Profile (<0.7 mm) Dual Sided Cooling Compatible Ultra Low Package Inductance Optimized for High Frequency Switching Ideal for CPU Core DC-DC Converters Optimized for both Sync.FET and some Control FET application Low Conduction and Switching Losses Compatible with existing Surface Mount Techniques
Typical values (unless otherwise specified)
VDSS
VGS
RDS(on)
RDS(on)
20V max 20V max 4.1m@ 10V 7.0m@ 4.5V
Qg
tot
Qgd
4.0nC
Qgs2
1.2nC
Qrr
32nC
Qoss
8.8nC
Vgs(th)
1.8V
11nC
MP
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details) SQ SX ST MQ MX MT MP
DirectFET ISOMETRIC
Description
The IRF6633 combines the latest HEXFET(R) Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6633 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6633 has been optimized for parameters that are critical in synchronous buck operating from 12 volt buss converters including Rds(on) and gate charge to minimize losses in the control FET socket.
Absolute Maximum Ratings
Parameter
VDS VGS ID @ TA = 25C ID @ TA = 70C ID @ TC = 25C IDM EAS IAR
20
Typical R DS (on) (m)
Max.
20 20 16 13 59 132 41 13
VGS, Gate-to-Source Voltage (V)
Units
V
Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS Continuous Drain Current, VGS Pulsed Drain Current Continuous Drain Current, VGS @ 10V
g
e @ 10V e @ 10V f h
12 10 8 6 4 2 0 0 4 8 ID= 13A
A
Single Pulse Avalanche Energy Avalanche CurrentAg
mJ A
ID = 16A 15 10 TJ = 125C 5 TJ = 25C 0 2.0 4.0 6.0 8.0 VGS, Gate-to-Source Voltage (V) 10.0
VDS = 16V VDS= 10V
12
16
20
24
Notes: Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Surface mounted on 1 in. square Cu board, steady state.
Fig 1. Typical On-Resistance Vs. Gate Voltage
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
TC measured with thermocouple mounted to top (Drain) of part. Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25C, L = 0.51mH, RG = 25, IAS = 13A.
www.irf.com
1
6/2/05
IRF6633
Static @ TJ = 25C (unless otherwise specified)
Parameter
BVDSS VDSS/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min.
20 --- --- --- 1.4 --- --- --- --- --- 35 --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. Max. Units
--- 16 4.1 7.0 1.8 -5.2 --- --- --- --- --- 11 3.3 1.2 4.0 2.5 5.2 8.8 1.5 9.7 31 12 4.3 1250 630 200 --- --- 5.6 9.4 2.2 --- 1.0 150 100 -100 --- 17 --- --- --- --- --- --- --- --- --- --- --- --- --- --- pF VGS = 0V VDS = 10V = 1.0MHz ns nC
Conditions
VGS = 0V, ID = 250A VGS = 10V, ID = 16A c VGS = 4.5V, ID = 13A c VDS = VGS, ID = 250A VDS = 16V, VGS = 0V VDS = 16V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VDS = 10V, ID = 13A VDS = 10V
V m V mV/C A nA S
mV/C Reference to 25C, ID = 1mA
nC
VGS = 4.5V ID = 13A See Fig. 15 VDS = 10V, VGS = 0V VDD = 16V, VGS = 4.5V ID = 13A Clamped Inductive Load c
Diode Characteristics
Parameter
IS ISM VSD trr Qrr Continuous Source Current @TC=25C (Body Diode) Pulsed Source Current (Body Diode) d Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge --- --- --- 0.8 18 32 1.0 27 48 V ns nC --- --- 132
Min.
---
Typ. Max. Units
--- 52 A
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 13A, VGS = 0V c TJ = 25C, IF = 13A di/dt = 500A/s c
Notes:
Pulse width 400s; duty cycle 2%. Repetitive rating; pulse width limited by max. junction temperature.
2
www.irf.com
IRF6633
Absolute Maximum Ratings
PD @TA = 25C PD @TA = 70C PD @TC = 25C TP TJ TSTG
Power Dissipation Power Dissipation f
Power Dissipation Operating Junction and
Parameter
Max.
2.3 1.5 89 270 -40 to + 150
Units
W
Peak Soldering Temperature Storage Temperature Range
C
Thermal Resistance
RJA RJA RJA RJC RJ-PCB
g Junction-to-Ambient dg Junction-to-Ambient eg Junction-to-Case fg
Junction-to-Ambient Linear Derating Factor
100
Parameter
Typ.
--- 12.5 20 --- 1.0 0.018
Max.
55 --- --- 3.0 ---
Units
C/W
Junction-to-PCB Mounted
A
W/C
D = 0.50
Thermal Response ( Z thJA )
10
0.20 0.10 0.05
1
0.02 0.01
J
R1 R1 J 1 2
R2 R2
R3 R3 3
R4 R4 4
R5 R5 C 5
Ri (C/W)
0.6676 1.0462 1.5611 29.282 25.455
i (sec)
0.000066 0.000896 0.004386 0.68618
1
2
3
4
5
Ci= i/Ri Ci= i/Ri
0.1
SINGLE PULSE ( THERMAL RESPONSE )
0.01 1E-006 1E-005 0.0001 0.001 0.01 0.1
32 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + Tc
1 10 100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Surface mounted on 1 in. square Cu board, steady state. Used double sided cooling , mounting pad. Mounted on minimum footprint full size board with metalized
back and with small clip heatsink. Notes:
TC measured with thermocouple incontact with top (Drain) of part. R is measured at TJ of approximately 90C.
Surface mounted on 1 in. square Cu board (still air).
Mounted to a PCB with small clip heatsink (still air)
Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air)
www.irf.com
3
IRF6633
1000
TOP VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V
1000
TOP VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
10 2.5V
1 2.5V
60s PULSE WIDTH
Tj = 25C 0.1 0.1 1 10 100 VDS , Drain-to-Source Voltage (V) 1 0.1 1
60s PULSE WIDTH
Tj = 150C 10 100
Fig 4. Typical Output Characteristics
1000
VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Output Characteristics
2.0 ID = 16A VGS = 4.5V VGS = 10V 1.5
ID, Drain-to-Source Current ()
100 TJ = 150C TJ = 25C 10 TJ = -40C
Typical RDS(on) (Normalized)
VDS = 10V 60s PULSE WIDTH 3.0 3.5 4.0 4.5 5.0
1.0
1
0.1 1.5 2.0 2.5
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 6. Typical Transfer Characteristics
10000
VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd
Fig 7. Normalized On-Resistance vs. Temperature
20 TJ = 25C 16 Vgs = 3.5V Vgs = 4.0V Vgs = 4.5V Vgs = 5.0V Vgs = 10V
1000
Ciss Coss
Typical RDS (on) (m)
Coss = Cds + Cgd
C, Capacitance(pF)
12
8
Crss 100 1 10 VDS , Drain-to-Source Voltage (V) 100
4 0 20 40 60 80 100
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
Fig 9. Typical On-Resistance Vs. Drain Current and Gate Voltage
ID, Drain Current (A)
4
www.irf.com
IRF6633
1000.0
ID, Drain-to-Source Current (A)
1000
OPERATION IN THIS AREA LIMITED BY R DS(on)
ISD , Reverse Drain Current (A)
100.0
TJ = 150C TJ = 25C TJ = -40C
100
10.0
10
100sec 1msec
1.0 VGS = 0V 0.1 0.2 0.4 0.6 0.8 1.0 1.2 VSD , Source-to-Drain Voltage (V)
1
10msec TA = 25C Tj = 150C Single Pulse 0.1 1.0 10.0 100.0
0.1 VDS , Drain-toSource Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
Typical VGS(th) Gate threshold Voltage (V)
Fig11. Maximum Safe Operating Area
2.5
60 50
ID, Drain Current (A)
40 30 20 10 0 25 50 75 100 125 150 TC , Case Temperature (C)
2.0
ID = 250A
1.5
1.0 -75 -50 -25 0 25 50 75 100 125 150
TJ , Junction Temperature ( C )
Fig 12. Maximum Drain Current vs. Case Temperature
200
Fig 13. Typical Threshold Voltage vs. Junction Temperature
ID 5.7A 8.7A BOTTOM 13A
TOP
EAS, Single Pulse Avalanche Energy (mJ)
160
120
80
40
0 25 50 75 100 125 150
Starting TJ, Junction Temperature (C)
Fig 14. Maximum Avalanche Energy Vs. Drain Current
www.irf.com
5
IRF6633
Current Regulator Same Type as D.U.T.
Id Vds
50K 12V .2F .3F
Vgs
D.U.T. VGS
3mA
+ V - DS
Vgs(th)
IG
ID
Current Sampling Resistors
Qgs1 Qgs2
Qgd
Qgodr
Fig 15a. Gate Charge Test Circuit
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
tp
DRIVER
VDS
L
VGS RG
D.U.T
IAS
+ V - DD
A
20V
tp
0.01
I AS
Fig 16c. Unclamped Inductive Waveforms
Fig 16b. Unclamped Inductive Test Circuit
LD VDS
90%
+
VDD D.U.T VGS Pulse Width < 1s Duty Factor < 0.1%
VDS
10%
VGS
td(on) tr td(off) tf
Fig 17a. Switching Time Test Circuit
Fig 17b. Switching Time Waveforms
6
www.irf.com
IRF6633
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * di/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage
Body Diode
Forward Drop
Inductor Curent Inductor Current
Ripple 5% ISD
* VGS = 5V for Logic Level Devices Fig 18. Diode Reverse Recovery Test Circuit for N-Channel HEXFET(R) Power MOSFETs
DirectFET Substrate and PCB Layout, MP Outline (Medium Size Can, P-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
D G D S S
D
G- Gate D- Drain S- Source
D
www.irf.com
7
IRF6633
DirectFET Outline Dimension, MP Outline (Medium Size Can, P-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
DIMENSIONS NOTE: CONTROLLING DIMENSIONS ARE IN MM
METRIC CODE MIN MAX A 6.25 6.35 B 5.05 4.80 3.95 C 3.85 D 0.45 0.35 E 0.62 0.58 F 0.58 0.62 G 0.79 0.75 0.57 H 0.53 J 0.63 0.67 K 1.72 1.59 L 2.87 3.04 M 0.70 0.59 N 0.08 0.03 P 0.08 0.17 IMPERIAL MAX 0.246 1.889 0.152 0.014 0.023 0.023 0.030 0.021 0.025 0.063 0.113 0.023 0.001 0.003 MAX 0.250 0.199 0.156 0.018 0.032 0.032 0.031 0.022 0.026 0.068 0.119 0.028 0.003 0.007
DirectFET Part Marking
8
www.irf.com
IRF6633
DirectFET Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6633). For 1000 parts on 7" reel, order IRF6633TR1 REEL DIMENSIONS TR1 OPTION (QTY 1000) STANDARD OPTION (QTY 4800) IMPERIAL IMPERIAL METRIC METRIC CODE MIN MAX MIN MAX MAX 6.9 A N.C 177.77 N.C N.C B 0.75 N.C 19.06 N.C N.C C 0.53 0.50 13.5 13.2 12.8 D 0.059 N.C 1.5 N.C N.C E 2.31 N.C 58.72 N.C N.C F N.C 0.53 N.C 18.4 13.50 G 0.47 11.9 N.C 14.4 12.01 H 0.47 11.9 N.C 15.4 12.01
Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.06/05
www.irf.com
9

▲Up To Search▲

Price & Availability of IRF6633

	To Download IRF6633 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .